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  cmos low voltage 2.5 dual spdt switch adg736 rev. c information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2003C2007 analog devices, inc. all rights reserved. features 1.8 v to 5.5 v single supply automotive temperature range: ? 40c t o +125c 2.5 (t ypical) on resistance low on resistance flatness ? 3 db bandwid th > 200 mhz rail-to-rail operation 10-lead msop package fast switching times t on : 16 ns t off : 8 ns typical power consumption (<0.01 w) ttl-/cmos-compatible applications usb 1.1 signal switching circuits cell phones pdas battery-powered systems communications systems sample-and-hold systems audio signal routing audio and video switching mechanical reed relay replacement functional block diagram 00046-001 switches shown for a logic 1 input adg736 s1a s1b d1 in1 s2b in2 d2 s2a 2 10 6 9 1 4 7 5 figure 1. general description the adg736 is a monolithic device comprising two independ- ently selectable cmos single pole, double throw (spdt) switches. these switches are designed using a submicron process that provides low power dissipation yet gives high switching speed, low on resistance, low leakage currents, and wide input signal bandwidth. the on resistance profile is very flat over the full analog signal ra nge. this ensures excellent linearity and low distortion when switching audio signals. fast switching speed also makes the part suitable for video signal switching. the adg736 operates from a single 1.8 v to 5.5 v supply, ma king it ideally suited to portable and battery-powered instruments. each switch conducts equally well in both directions when on, and e ach has an input signal range that extends to the power supplies. the adg736 exhibits break-before-make switching action. the adg736 is available in a 10-lead msop package. product highlights 1. 1.8 v to 5.5 v single-supply operation. the adg736 offers high performance, including low on resistance and fast switching times. it is fully specified and guaranteed with 3 v and 5 v supply rails. 2. ve r y l ow r on (4.5 maximum at 5 v, 8 maximum at 3 v). at a supply voltage of 1.8 v, r on is typically 35 over the temperature range. 3. l ow on resistance flatness. 4. ?3 db b andwidth > 200 mhz. 5. lo w power dissipation. cmos construction ensures low power dissipation. 6. fa st t on /t off . 7. bre ak-before-make switching action. 8. 10-l ead msop package.
adg736 rev. c | page 2 of 12 table of contents features .............................................................................................. 1 applications ....................................................................................... 1 general description ......................................................................... 1 functional block diagram .............................................................. 1 product highlights ........................................................................... 1 revision history ............................................................................... 2 specifications ..................................................................................... 3 absolute maximum ratings ............................................................ 5 esd caution .................................................................................. 5 pin configuration and function descriptions..............................6 typical performance characteristics ..............................................7 test circ u its ........................................................................................9 ter mi nolo g y .................................................................................... 10 applications information .............................................................. 11 outline dimensions ....................................................................... 12 ordering guide .......................................................................... 12 revision history 12/07rev. b to rev. c updated temperature range (throughout)................................. 1 c hanges to features section............................................................ 1 changes to figure 4 and figure 5................................................... 7 changes to ordering guide .......................................................... 12 1/07rev. a to rev. b updated format..................................................................universal c hanges to leakage currents ......................................................... 3 changes to leakage currents ......................................................... 4 changes to ordering guide .......................................................... 12 updated outline dimensions ....................................................... 12 11/03rev. 0 to rev. a renumbered figures and tpcs........................................universal c hange to title.................................................................................. 1 changes to applications .................................................................. 1 changes to absolute maximum ratings ....................................... 4 changes to ordering guide ............................................................ 4 changes to test circuit 3................................................................. 7 changes to outline dimensions..................................................... 8
adg736 rev. c | page 3 of 12 specifications v dd = 5 v 10%, gnd = 0 v. all specifications ?40c to +125c, unless otherwise noted. table 1. b version parameter 25c ? 40c to +85 c ? 40c to +125 c unit test conditions/comments analog switch analog signal range 0 v to v dd v on resistance (r on ) 2.5 typ v s = 0 v to v dd , i ds = ?10 ma; see figure 10 4 4.5 7 max on resistance match between channels (?r on ) 0.1 typ v s = 0 v to v dd , i ds = ?10 ma 0.4 0.4 max on resistance flatness (r flat (on) ) 0.5 typ v s = 0 v to v dd , i ds = ?10 ma 1.2 1.5 max leakage currents v dd = 5.5 v source off leakage i s (off) 0.01 1 na typ v s = 4.5 v/1 v, v d = 1 v/4.5 v; see figure 11 channel on leakage i d , i s (on) 0.01 5 na typ v s = v d = 1 v or 4.5 v; see figure 12 digital inputs input high voltage, v inh 2.4 2.4 v min input low voltage, v inl 0.8 0.8 v max input current, i inl or i inh 0.005 a typ v in = v inl or v inh 0.1 0.1 a max dynamic characteristics 1 t on 12 ns typ r l = 300 , c l = 35 pf 16 16 ns max v s = 3 v; see figure 13 t off 5 ns typ r l = 300 , c l = 35 pf 8 8 ns max v s = 3 v; see figure 13 break-before-make time delay, t d 7 ns typ r l = 300 , c l = 35 pf 1 1 ns min v s1 = v s2 = 3 v; see figure 14 off isolation C62 db typ r l = 50 , c l = 5 pf, f = 10 mhz C82 db typ r l = 50 , c l = 5 pf, f = 1 mhz; see figure 15 channel-to-channel crosstalk C62 db typ r l = 50 , c l = 5 pf, f = 10 mhz C82 db typ r l = 50 , c l = 5 pf, f = 1 mhz; see figure 16 bandwidth (C3 db) 200 mhz typ r l = 50 , c l = 5 pf; see figure 17 c s (off) 9 pf typ c d , c s (on) 32 pf typ power requirements v dd = 5.5 v i dd 0.001 a typ digital inputs = 0 v or 5 v 1.0 1.0 a max 1 guaranteed by design; not subject to production test.
adg736 rev. c | page 4 of 12 v dd = 3 v 10%, gnd = 0 v. all specifications ? 40c to +125c, unless otherwise noted. table 2. b version parameter 25c ? 40c to +85 c ? 40c to +125 c unit test conditions/comments analog switch analog signal range 0 v to v dd v on resistance (r on ) 5 5.5 typ v s = 0 v to v dd , i ds = ?10 ma; see figure 10 8 12 max see figure 10 on resistance match between channels (?r on ) 0.1 typ v s = 0 v to v dd , i ds = ?10 ma 0.4 0.4 max on resistance flatness (r flat (on) ) 2.5 2.5 typ v s = 0 v to v dd , i ds = ?10 ma leakage currents v dd = 3.3 v source off leakage i s (off) 0.01 1 na typ v s = 3 v/1 v, v d = 1 v/3 v; see figure 11 channel on leakage i d , i s (on) 0.01 5 na typ v s = v d = 1 v or 3 v; see figure 12 digital inputs input high voltage, v inh 2.0 2.4 v min input low voltage, v inl 0.4 0.8 v max input current, i inl or i inh 0.005 a typ v in = v inl or v inh 0.1 0.1 a max dynamic characteristics 1 t on 14 ns typ r l = 300 , c l = 35 pf 20 20 ns max v s = 2 v; see figure 13 t off 6 ns typ r l = 300 , c l = 35 pf 10 10 ns max v s = 2 v; see figure 13 break-before-make time delay, t d 7 ns typ r l = 300 , c l = 35 pf 1 1 ns min v s1 = v s2 = 2 v; see figure 14 off isolation ?62 db typ r l = 50 , c l = 5 pf, f = 10 mhz ?82 db typ r l = 50 , c l = 5 pf, f = 1 mhz; see figure 15 channel-to-channel crosstalk ?62 db typ r l = 50 , c l = 5 pf, f = 10 mhz ?82 db typ r l = 50 , c l = 5 pf, f = 1 mhz; see figure 16 bandwidth (?3 db) 200 mhz typ r l = 50 , c l = 5 pf; see figure 17 c s (off) 9 pf typ c d , c s (on) 32 pf typ power requirements v dd = 3.3 v i dd 0.001 a typ digital inputs = 0 v or 3 v 1.0 1.0 a max 1 guaranteed by design; not subject to production test.
adg736 rev. c | page 5 of 12 absolute maximum ratings t a = 25c, unless otherwise noted. table 3. parameter rating v dd to gnd ? 0.3 v to +6 v analog, digital inputs 1 ? 0.3 v to v dd + 0.3 v or 30 ma, whichever occurs first continuous current, s or d 30 ma peak current, s or d 100 ma (pulsed at 1 ms, 10% dut y cycle maximum) operating temperature range automotive ?40c to +125c storage temperature range ?65c to +150c junction temperature 150c msop package, power dissipation 315 mw ja thermal impedance 205c/w lead temperature (soldering, 10 sec) 300c ir reflow (peak temperature, <20 sec) 235c lead-free reflow soldering peak temperature 260(+0/?5)c time at peak temperature 10 sec to 40 sec esd 2 kv 1 overvoltages at in, s, or d are clamped by internal diodes. current should be limited to the maximum ratings given. stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. esd caution
adg736 rev. c | page 6 of 12 pin configuration and fu nction descriptions 00046-002 adg736 top view (not to scale) in1 1 s1a 2 gnd 3 s2a 4 in2 5 d1 s1b v dd s2b d2 10 9 8 7 6 figure 2. pin configuration table 4. pin function descriptions pin no. mnemonic description 1 in1 logic control input. 2 s1a source t erminal. may be an input or output. 3 gnd ground (0 v) reference. 4 s2a source t erminal. may be an input or output. 5 in2 logic control input. 6 d2 drain terminal. may be an input or output. 7 s2b source t erminal. may be an input or output. 8 v dd most positive power supply potential. 9 s1b source t erminal. may be an input or output. 10 d1 drain terminal. may be an input or output. table 5. truth table logic switch a switch b 0 off on 1 on off
adg736 rev. c | page 7 of 12 typical performance characteristics 6.0 5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 0 0.51.01.52.02.53.03.54.04.55.0 00046-003 v d or v s (drain or source voltage) (v) r on ( ? ) t a = 25c v dd = 2.7v v dd = 3.0v v dd = 5.0v v dd = 4.5v figure 3. o n resistance as a function of v d or v s single supplies 6.0 5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 0 0.5 1.0 1.5 2.0 2.5 3.0 00046-004 v d or v s (drain or source voltage) (v) r on ( ? ) v dd = 3v +85c +25c +125c ?40c figure 4. o n resistance as a function of v d or v s for different temperatures v dd = 3 v 6.0 5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 0 0.51.01.52.02.53.03.54.04.55.0 00046-005 v d or v s (drain or source voltage) (v) r on ( ? ) v dd = 5v +85c +125c +25c ?40c figure 5. o n resistance as a function of v d or v s for different temperatures v dd = 5 v 10m 1m 100 10 1 100n 10n 1n 100 10m 1m 100k 10k 1k 00046-006 frequency (hz) i supply (a) v dd = 5v t a = 25c figure 6. su pply current vs. input switching frequency
adg736 rev. c | page 8 of 12 0 ?8 ?4 ?2 10k 100m 1m 10m 100k 00046-007 frequency (hz) on response (db) v dd = 5v t a = 25c figure 7 . bandwidth ?30 ?130 ?120 ?110 ?100 ?90 ?80 ?70 ?60 ?50 ?40 10k 100m 1m 10m 100k 00046-008 frequency (hz) off isolation (db) v dd = 5v, 3v t a = 25c figure 8. o ff isolation vs. frequency ?30 ?130 ?120 ?110 ?100 ?90 ?80 ?70 ?60 ?50 ?40 10k 100m 1m 10m 100k 00046-009 frequency (hz) crosstalk (db) v dd = 5v, 3v t a = 25c figure 9. crosstalk vs. frequency
adg736 rev. c | page 9 of 12 test circuits sd v s r on = v1/i ds i ds v1 00046-011 figure 10. on resistance sd v s v d i s (off) a 00046-012 figure 11. off leakage sd v d i d (on) nc a 00046-013 figure 12. o n leakage 00046-014 d in gnd r l 300 c l 35pf v dd v in v out v s v dd v out t on t off 50% 50% 90% 90% 0.1 f s figure 13 . switching times v out v in v s t d t d 50% 50% 50% 50% 0v 0v d v in gnd r l 300 c l 35pf v dd v out v s v dd 0.1 f sa sb 90% 00046-015 figure 14 . break-before-make time delay, t d 00046-016 v dd r l 50 0.1 f v out v in v s v dd in sb sa d gnd figure 15. off isolation 00046-017 v dd 0.1 f v dd gnd channel-to-channel crosstalk = 20 log |v s /v out | 50 v in1 v s sd v in2 v out sd nc r l 50 figure 16. channel-to-channel crosstalk 00046-018 v dd r l 50 0.1 f v out v in v s v dd in sd gnd figure 17 . bandwidth
adg736 rev. c | page 10 of 12 terminology r on ohmic resistance between terminal d and terminal s. r on on resistance match between any two channels; that is, r on maximum ? r on minimum. r flat (on) flatness is defined as the difference between the maximum and minimum value of on resistance as measured over the specified analog signal range. i s (off) source leakage current with the switch off. i d , i s (on) channel leakage current with the switch on. v d (v s ) analog voltage on terminal d and terminal s. c s (off) off switch source capacitance. c d , c s (on) on switch capacitance. t on delay between applying the digital control input and the output switching on. see figure 13. t off delay between applying the digital control input and the output switching off. see figure 13. t d off time or on time measured between the 90% points of both switches, when switching from one address state to another. see figure 14. crosstalk a measure of unwanted signal that is coupled from one channel t o another as a result of parasitic capacitance. off isolation a measure of unwanted signal coupling through an off switch. bandwidth the frequency at which the output is attenuated by ?3 db. on response the frequency response of the on switch. on loss the voltage drop across the on switch, seen on the on response v s. frequency plot (see figure 7 ) as how many decibels (db) the sig nal is away from 0 db at very low frequencies.
adg736 rev. c | page 11 of 12 applications information 00046-010 a = 2 75 r l 75 v out 250 250 d s1a v+ adg736 v dd in1 75 ch 1 75 ch 2 s1b figure 1 8. using the adg736 to select between two video signals
adg736 rev. c | page 12 of 12 outline dimensions compliant to jedec standards mo-187-ba 0.23 0.08 0.80 0.60 0.40 8 0 0.15 0.05 0.33 0.17 0.95 0.85 0.75 seating plane 1.10 max 10 6 5 1 0.50 bsc pin 1 coplanarity 0.10 3.10 3.00 2.90 3.10 3.00 2.90 5.15 4.90 4.65 figure 1 9. 10-lead mini small outline package [msop] (r m-10) dimensions shown in millimeters ordering guide model temperature range package description package option branding adg736brm ?40c to +125c 10-lead mini small outline package (msop) rm-10 sab adg736brm-reel ?40c to +125c 10-lead mini small outline package (msop) rm-10 sab adg736brm-reel7 ?40c to +125c 10-lead mini small outline package (msop) rm-10 sab adg736brmz 1 ?40c to +125c 10-lead mini small outline package (msop) rm-10 sab# adg736brmz-reel 1 ?40c to +125c 10-lead mini small outline package (msop) rm-10 sab# ADG736BRMZ-REEL7 1 ?40c to +125c 10-lead mini small outline package (msop) rm-10 sab# t 1 z = rohs compliant part, # denotes rohs compliant part may be top or bottom marked. ?2003C2007 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. d00046-0-12/07(c) ttt


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